ieee papers for project(vlsi & es)

A Novel Design and Simulation of a Compact and Ultra Fast CNTFET Multi-valued Inverter Using HSPICE

Abstract

This paper presents a novel design of a compact multi-valued inverter circuit using Carbon Nanotube Field effect Transistor (CNTFET). All simulations are done by using HSPICE model of CNTFET. The novelty of this paper is by using only one circuit all multi-valued output can be achieved than using three different CNTFET circuits or complex band-gap reference circuits to produce each reference voltage for precise output in case of CMOS implementation which are previously done. Also the same design implementation using MOSFETs with different threshold mask would increase higher process cost. It is widely considered that CNTFET possesses high fabrication feasibility and superior device performance than MOSFET. The extensive simulated results and performance bench-marking of the proposed design also show a significant reduction in power delay product (PDP) which aids over 50% faster speed than typical multi-valued inverter. Hence with this uniquely new design it is possible to accomplish simplicity, energy efficiency and of course reducing the chip area in modern ultra low power VLSI circuits.



Paper Link : http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=6205527&contentType=Conference+Publications&ranges%3D2011_2012_p_Publication_Year%26matchBoolean%3Dtrue%26searchField%3DSearch_All%26queryText%3D%28%28%28VLSI%29+AND+Low+power%29+AND+hspice%29